2D Fast Fourier Transform based Image Processor on a Zync (FPGA)
Published:
“Group Project. My Contribution: Designing the outer controller for PS Config Regs, Cache Address Controlling and PE(Process element) control “
Code: GitHub repository
Published:
“Group Project. My Contribution: Designing the outer controller for PS Config Regs, Cache Address Controlling and PE(Process element) control “
Code: GitHub repository